1. Field of the Invention
The invention relates to a package structure and wafer-level fabrication thereof, and more particularly, to a package structure of integrating micro-electromechanical systems and image chips and wafer-level fabrication thereof.
2. Description of the Prior Art
The development of semiconductor processes has stimulated the progression of image sensor devices, such as complementary metal-oxide semiconductor (CMOS) sensors. In contrast to charged coupled device (CCD) sensors, CMOS sensors have the advantage of small size and cheap price even after being processed through the packaging process. However, ways to significantly increase the variability of designs and application of the CMOS sensors while maintaining the basic architecture has become a critical task. Additionally, ways to decrease the fabrication cost of the CMOS sensor package and apply the sensors to lower priced products has become another important factor.
Currently, the integration of micro-electromechanical systems (MEMS) and CMOS sensors into a package device has become an important technique in miniaturized packages, in which the operating space for micro-electromechanical systems has to be taken into great consideration. Hence, ways to lower the cost of fabricating an integrated package structure has become a critical matter.